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S IGN DE S EW H RN t D FO S-0547R enter a E END RH, H rvice C om/tsc M COM 0546 l Se sil.c T RE ee HS- echnica w.inter Radiation Hardened Single 16/Differential NO S ur T ww ct o RSIL or ta September 1997 8 Channel CMOS Analog Multiplexer con -INTE 888 1(R) HS-0506RH, HS-0507RH Features * Low On Resistance 400 Max * Wide Analog Signal Range 15V * TTL/CMOS Compatible 2.4V (Logic "1") * Access Time 1000ns Max * 44V Maximum Power Supply * Break-Before-Make Switching * No Latch-up * Gamma Dose 1 x 104 RAD (Si) Description These radiation hardened monolithic CMOS multiplexers each include an array of sixteen analog switches, a digital decode circuit for channel selection, voltage reference for logic thresholds, and an ENABLE input for device selection when several multiplexers are present. The Dielectric Isolation (DI) process used in fabrication of these devices eliminates the problem of latchup. Also, DI offers much lower substate leakage and parasitic capacitance than conventional junction isolated CMOS. The switching threshold for each digital input is established by an internal +5V reference, providing a guaranteed minimum 2.4V for logic "1" and maximum 0.8V for logic "0". This allows direct interface without pullup resistors to signals from most logic families: CMOS, TTL, DTL and some PMOS. For protection against transient overvoltage, the digital inputs include a series 200 resistor and diode clamp to each supply. The HS-0506RH is a sixteen channel single-ended multiplexer, and the HS-0507RH is an eight channel differential version. If input overvoltage protection is needed, the HS-0506RH or HS-0507RH multiplexers are recommended. For further information see Application Notes 520 and 521. Applications * Data Acquisition Systems * Precision Instrumentation * Demultiplexing * Selector Switch Ordering Information PART NUMBER HS1-0506RH-Q HS1-0507RH-Q TEMPERATURE RANGE -55 C to 125 C -55oC to 125oC o o PACKAGE 28 Lead CerDIP 28 Lead CerDIP Pinouts HS-0506RH 28 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE (CerDIP) MIL-STD-1835 GDIP1-T28 TOP VIEW VSUPPLY 1 NC 2 NC 3 IN 16 4 IN 15 5 IN 14 6 IN 13 7 IN 12 8 IN 11 9 IN 10 10 IN 9 11 GND 12 NC 13 ADDRESS A3 14 28 OUT 27 -VSUPPLY 26 IN 8 25 IN 7 24 IN 6 23 IN 5 22 IN 4 21 IN 3 20 IN 2 19 IN 1 18 ENABLE 17 ADDRESS A0 16 ADDRESS A1 15 ADDRESS A2 HS-0507RH 28 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE (CerDIP) MIL-STD-1835 GDIP1-T28 TOP VIEW +VSUPPLY 1 OUT B 2 NC 3 IN 8B 4 IN 7B 5 IN 6B 6 IN 5B 7 IN 4B 8 IN 3B 9 IN 2B 10 IN 1B 11 GND 12 NC 13 NC 14 28 OUT A 27 -VSUPPLY 26 IN 8A 25 IN 7A 24 IN 6A 23 IN 5A 22 IN 4A 21 IN 3A 20 IN 2A 19 IN 1A 18 ENABLE 17 ADDRESS A0 16 ADDRESS A1 15 ADDRESS A2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 1 Spec Number File Number 518860 4028.1 DB NA HS-0506RH, HS-0507RH Functional Diagrams HS-0506RH HS-0507RH IN1 IN2 DECODER/ DRIVER IN16 OUT IN1A IN8A IN1B IN8B DECODER/ DRIVER OUT A OUT B 5V REF LEVEL SHIFT 5V REF LEVEL SHIFT DIGITAL INPUT PROTECTION DIGITAL INPUT PROTECTION A0 A1 A2 A3 EN A0 A1 A2 EN HS-0506RH TRUTH TABLE HS-0507RH TRUTH TABLE "ON" CHANNEL PAIR NONE 1 2 3 4 5 6 7 8 A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN L H H H H H H H H H H H H H H H H "ON" CHANNEL NONE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A2 X L L L L H H H H A1 X L L H H L L H H A0 X L H L H L H L H EN L H H H H H H H H Spec Number 2 518860 Specifications HS-0506RH, HS-0507RH Absolute Maximum Ratings Voltage Between Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . +44V +VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +22V -VSUPPLY to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V Analog Input Overvoltage: +VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +2V -VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VSUPPLY -2V Digital Input Overvoltage: +VEN, +VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +4V -VEN, -VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VSUPPLY -4V or 20mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current, S or D (Pulsed at 1ms, 10% Duty Cycle Maximum . . . . . . . . . . . . . 40mA Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +275oC Reliability Information Thermal Resistance JA JC CerDIP Package . . . . . . . . . . . . . . . . . . . 51oC/W 18oC/W Maximum Package Power Dissipation at +125oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.98W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19.6mW/oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC Operating Supply Voltage (VSUPPLY). . . . . . . . . . . . . . . . . . 15V Analog Input Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V Logic High Level (VAH). . . . . . . . . . . . . . . . . . . . +4V to +VSUPPLY Max RMS Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified. GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 VS = +10V, VD = -10V, VEN = 0.8V, All Unused Inputs = -10V VS = -10V, VD = +10V, VEN = 0.8V All Unused Inputs = +10V VD = +10V, VEN = 0.8V All Unused Inputs = -10V VD = -10V, VEN = 0.8V All Unused Inputs = +10V VS = VD = +10V All Unused Inputs = 10V HS-0506RH HS-0507RH HS-0506RH HS-0507RH -ID(OFF) HS-0506RH HS-0507RH HS-0506RH HS-0507RH Leakage Current F from an "ON" Driver into the Switch (Drain) +ID(ON) HS-0506RH HS-0507RH HS-0506RH HS-0507RH -ID(ON) VS = VD = -10V All Unused Inputs = +10V HS-0506RH HS-0507RH HS-0506RH HS-0507RH 1 2, 3 1 2, 3 1 2, 3 2, 3 1 2, 3 2, 3 1 2, 3 2, 3 1 2, 3 2, 3 LIMITS TEMPERATURE +25 C, +125 C, -55oC +25oC, +125oC, -55oC +25oC +125oC, -55oC o o PARAMETERS Input Leakage Current SYMBOL IIH IIL CONDITIONS Measure Inputs Sequentially GND All Unused Inputs MIN -1.0 -1.0 -10 -50 -10 -50 -10 -300 -200 -10 -300 -200 -10 -300 -200 -10 -300 -200 MAX 1.0 1.0 +10 +50 +10 +50 +10 +300 +200 +10 +300 +200 +10 +300 +200 +10 +300 +200 UNITS A A nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA Leakage Current into the Source Terminal of an ``OFF'' Switch +IS(OFF) -IS(OFF) +25oC +125oC, -55oC Leakage Current into the Drain Terminal of an "OFF" Switch +ID(OFF) +25oC +125oC, -55oC +125oC, -55oC C +25o +125oC, -55oC +125o C, -55 C o o +25 C +125oC, -55oC +125 C, -55 C +25oC +125oC, -55oC +125oC, -55oC o o Spec Number 3 518860 Specifications HS-0506RH, HS-0507RH TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified. GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1 2, 3 -RDS1 VS = -10V, ID = +1mA 1 2, 3 Logic Level Voltage VAL VAH NOTE: 1. Use for forcing conditions for all DC tests unless otherwise specified. Note 1 Note 1 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC, 55oC +125oC, MIN -1.0 -1.0 o PARAMETERS Positive Supply Current Negative Supply Current Standby Positive Supply Current Standby Negative Supply Current Switch "ON" Resistance SYMBOL I(+) I(-) +ISBY -ISBY +RDS1 CONDITIONS VA = 0V, VEN = 2.4V VA = 0V, VEN = 2.4V VA = 0V, VEN = 0V VA = 0V, VEN = 0V VS = +10V, ID = -1mA MAX 3.0 3.0 300 400 300 400 0.8 UNITS mA mA mA mA V V +25oC, +125oC, 55oC +25oC,+ 125oC, 55oC +25oC,+125oC, 55oC +25oC +125 oC, -55oC +25oC +125 C, -55 C +25oC, 55oC +125oC, o - +25oC, +125oC, 55oC 2.4 - TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified GROUP A SUBGROUPS 9 LIMITS TEMPERATURE +25oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 25 MAX UNITS ns PARAMETERS Break-Before-Make Time Delay Propogation Delay Times: Address Inputs to I/O Channel Times Enable to I/O SYMBOL tD CONDITIONS RL = 200 tA RL = 10M 9 10, 11 - 500 1000 500 1000 500 1000 ns ns ns ns ns ns tON(EN) RL = 200 9 10, 11 tOFF(EN) RL = 200 9 10, 11 Spec Number 4 518860 Specifications HS-0506RH, HS-0507RH TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device tested at +VSUPPLY = +15V, -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified LIMITS PARAMETERS Capacitance: Address Input Capacitance: Output Switch SYMBOL CA CONDITIONS V+ = V- = 0V f = 1MHz V+ = V- = 0V f = 1MHz HS-0506RH HS-0507RH Capacitance: Input Switch Charge Transfer Error CIS V+ = V- = 0V f = 1MHz VS = GND VGEN = 0V to 5V VEN = 0.8V,RL = 1k , CL = 15pF,VS = 7 VRMS f = 100kHz NOTE 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN MAX 12 UNITS pF COS 1 1 1 - 90 50 12 pF pF pF VCTE 1 - 10 mV Off Isolation VISO 1, 2 -50 - dB NOTES: 1. The parameters listed in this table are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 2. Worst case isolation occurs on channel 8B due to proximity of the output pins. TABLE 4A. POST 10K RAD DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified. LIMITS PARAMETERS Input Leakage Current SYMBOL IIH IIL Leakage Current into the Source Terminal of an ``OFF'' Switch +IS(OFF) VS = +10V, VD = -10V, VEN = 0.8V All Unused Inputs = -10V VS = -10V, VD = +10V, VEN = 0.8V All Unused Inputs = +10V VD = +10V, VEN = 0.8V All Unused Inputs = -10V HS-0506RH HS-0507RH -ID(OFF) VD = -10V, VEN = 0.8V All Unused Inputs = +10V HS-0506RH HS-0507RH Leakage Current from an "ON" Driver into the Switch (Drain) +ID(ON) VS = VD = +10V All Unused Inputs = -10V HS-0506RH HS-0507RH -ID(ON) VS = VD = -10V All Unused Inputs = +10V HS-0506RH HS-0507RH Positive Supply Current I(+) VA = 0V, VEN = 2.4V CONDITIONS Measure Inputs Sequentially GND All Unused Inputs TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN -1.0 -1.0 -50 MAX 1.0 1.0 +50 UNITS A A nA -IS(OFF) -50 +50 nA Leakage Current into the Drain Terminal of an "OFF" Switch +ID(OFF) -300 -200 -300 -200 -300 -200 -300 -200 - +300 +200 +300 +200 +300 +200 +300 +200 3.0 nA nA nA nA nA nA nA nA mA Spec Number 5 518860 Specifications HS-0506RH, HS-0507RH TABLE 4A. POST 10K RAD DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified. LIMITS PARAMETERS Negative Supply Current Standby Positive Supply Current Standby Negative Supply Current Switch "ON" Resistance SYMBOL I(-) +ISBY CONDITIONS VA = 0V, VEN = 2.4V VA = 0V, VEN = 0V TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN -1.0 MAX 3.0 UNITS mA mA -ISBY VA = 0V, VEN = 0V -1.0 - mA +RDS1 -RDS1 VS = +10V, ID = +1mA VS = -10V, ID = -1mA Note 1 Note 1 2.4 400 400 0.8 - V V Logic Level Voltage VAL VAH NOTE: 1. Use for forcing conditions for all DC tests unless otherwise specified. TABLE 4B. POST 10K RAD AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device tested at +VSUPPLY = +15V. -VSUPPLY = -15V, VEN = 2.4V, Unless Otherwise Specified. LIMITS PARAMETERS Propagation Delay Times: Address Inputs to I/O Channel Times Enable to I/O SYMBOL tA CONDITIONS RL = 10M TEMPERATURE +25oC +25oC +25oC MIN MAX 1000 UNITS ns tON(EN) tOFF(EN) RL = 200 RL = 200 - 1000 1000 ns ns Spec Number 6 518860 Specifications HS-0506RH, HS-0507RH TABLE 5. BURN-IN DELTA PARAMETERS (TA = +25oC) Device tested Per Table 1. PARAMETERS Input Leakage Current Leakage Current into the Source Terminal of an ``OFF'' Switch SYMBOL IIH, IIL +IS(OFF) -IS(OFF) Leakage Current into the Drain Terminal of an ``OFF'' Switch +ID(OFF) -ID(OFF) Leakage Current from an ``ON'' Driver into the Switch (Drain) +ID(ON) -ID(ON) Switch On Resistance R(DS) R(DS) Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current I(+) I(-) +ISBY -ISBY DELTA LIMITS 100nA 10nA 10nA 10nA 10nA 10nA 10nA 50 50 300A 100A 300A 100A TABLE 6. APPLICABLE SUBGROUPS GROUP A SUBGROUPS CONFORMANCE GROUPS Initial Test Interim Test PDA Final Test Group A (Note 1) Subgroup B5 Subgroup B6 Group D Group E, Subgroup 2 NOTES: 1. Alternate Group A testing in accordance with MIL-STD-883 Method 5005 may be exercised. 2. Table 5 parameters only. MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 Sample 5005 TESTED FOR -Q 1, 9 1, 9, 1, 2, 3, 10, 11 1, 2, 3, 9, 10, 11 1, 2, 3, 1 1 1 RECORDED FOR -Q 1 (Note 2) 1, (Note 2) - 1, 2, 3, (Note 2) - Spec Number 7 518860 HS-0506RH, HS-0507RH Intersil Space Level Product Flow -Q Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) (Note 1) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In, Condition A or B, 72 hrs. min., +125oC min., Method 1015 NOTES: 1. Modified SEM Inspection, not compliant to MIL-STD-883, Method 2018. This device does not meet the Class S minimum metal step coverage of 50%. The metal does meet the current density requirement of <2 E5 A/cm2. Data provided upon request. 2. Failures from subgroup 1 and deltas are used for calculating PDA. The maximum allowable PDA = 5%. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Group B and D inspections are optional and will not be performed unless required by the P.O. When required, the P.O. should include separate line items for Group B test, Group B samples, Group D test and Group D samples. 6. Group D Generic Data, as defined by MIL-I-38535, is optional and will not be supplied unless required by the P.O. When required, the P.O. should include a separate line item for Group D generic data. Generic data is not guaranteed to be available and is therefore not available in all cases. 7. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * Group B and D attributes and/or Generic data is included when required by the P.O. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% PDA 1, Method 5004 (Note 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic (X-Ray), Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) Sample - Group B, Method 5005 (Note 5) Sample - Group D, Method 5005 (Notes 5 and 6) 100% Data Package Generation (Note 7) Spec Number 8 518860 HS-0506RH, HS-0507RH Test Circuits INPUT LEAKAGE CURRENT V+ CH 1 CH 2 CH 3 GND VOUT CH 1 CH 2 CH 3 V+ ID(OFF) GND VOUT CH 1 CH 2 CH 3 V+ IS(OFF) GND VOUT ID (OFF) CH n A0 IIL IIH AN IIL IIH EN VS IIL IIH CH n A0 AN EN VD IS (OFF) CH n A0 VS 0.8V AN EN VD VAL = 0.8V; VAH = 2.4V UNUSED INPUTS TO GND VA = VEN = 0.8V TRUTH TABLE VAL = 0.8V; VAH = 2.4V ID(ON) V+ CH 1 CH 2 CH 3 GND VOUT SUPPLY CURRENTS V+ I(+) +SBY ID (ON) CH 1 CH 2 CH 3 GND VI(-) -SBY OUT CHARGE TRANSFER ERROR V+ CH 1 CH 2 CH 3 GND VOUT TEST POINT 0.01F CH n A0 VS 2.4V AN EN VD CH n A0 AN EN CH n A0 AN EN 5.0V TRUTH TABLE VAL = 0.8V VAH = 2.4V VA = 0V VEN = 2.4V VEN = 0V VGEN RDS V+ CH 1 CH 2 CH 3 GND VOUT VM RDN = VM ID CH 1 CH 2 CH 3 CH 4 CH 5 CH 6 CH 7 CH n A0 VS V+ OFF CHANNEL ISOLATION GND VOUT 1K OUT 15F(1) CH n A0 VS 2.4V AN EN ID AN (1) INCLUDES ALL FACTORS AND SCOPE OR VOLTMETER CAPACITANCE EN 0.8V TRUTH TABLE VAL = 0.8V; VAH = 2.4V Spec Number 9 518860 HS-0506RH, HS-0507RH Switching Waveforms +15V 3.5V 0V ADDRESS DRIVE (VA) VA 50% 50% OUTPUT +3.5V A3 IN 1 A2 IN 2 HS-0506RH THRU IN 15 A1 IN 16 A0 EN GND -V OUT +V +5V VA INPUT 2V/DIV. CH 1 ON VOUT OUTPUT 1V/DIV. CH 16 ON 200 tOPEN -15V SIMILAR CONNECTION FOR HS-0507RH 100ns/DIV FIGURE 1. BREAK-BEFORE-MAKE DELAY (tOPEN) +15V 3.5V 50% VA INPUT 2V/DIV. CH 1 ON 10V PROBE 10M 14pF -15V SIMILAR CONNECTION FOR HS-0507RH CH 16 ON 200ns/DIV OUTPUT 5V/DIV. ADDRESS DRIVE (VA) 0V A3 IN 1 A2 IN 2 HS-0506RH THRU IN 15 A1 A0 EN +3.5V GND -V IN 16 OUT +V 10V +10V 90% tA OUTPUT -10V FIGURE 2. ACCESS TIME vs LOGIC LEVEL (HIGH) +15V 3.5V ENABLE DRIVE 50% 0V OUTPUT A 90% tON(EN) tOFF (EN) -VA A3 A2 +V IN 1 +10V ENABLE DRIVE 2V/DIV. CH 1 ON OUTPUT 2V/DIV. 90% IN 2 THRU IN 16 A1 A0 HS-0506RH OUT EN GND -V VOUT 200 CH 1 OFF -15V SIMILAR CONNECTION FOR HS-0507RH 100ns/DIV FIGURE 3. ENABLE DELAY tON(EN), tOFF 9EN) Spec Number 10 518860 HS-0506RH, HS-0507RH Burn-Circuits V1 C1 D1 R1 1 2 3 4 5 6 7 8 9 10 11 12 13 F3 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 F4 F0 F1 F2 V1 R2 D2 V2 C2 V2 1 C1 D1 R1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R2 V3 D2 C2 DYNAMIC V1 = +15V minimum, +16V maximum V2 = -15V maximum, -16V minimum R1, R2 = 10k, 5%, 1/4 or 1/2W (per socket) C1, C2 = 0.01F minimum (per socket) or 0.1F minimum (per row) D1, D2 = 1N4002 or equivalent (per board) F0 = 100kHz, 10%; F1 = F0/2; F2 = F1/2; F3 = F2/2; F4 = F3/2 40% - 60% duty cycle; VIL = 0.8V maximum; VIH = 4.0V minimum NOTES: 1. The above test circuits are utilized for all package types. 2. The dynamic test circuit is utilized for all life testing. STATIC V1 = +5V minimum, +6V maximum V2 = +15V minimum, +16V maximum V3 = -15V maximum, -16V minimum R1, R2 = 10k, 5%, 1/4 or 1/2W (per socket) C1, C2 =0.01F minimum (per socket) or 0.1F minimum (per row) D1, D2 = 1N4002 or equivalent (per board) Irradiation Circuit +15V 1 2 10k NC +1V 3 4 5 6 7 8 9 10 11 12 13 14 +5V 28 27 26 25 24 23 22 21 20 19 18 17 16 15 -15V 10k Spec Number 11 518860 HS-0506RH, HS-0507RH Schematic Diagrams +V P P P P P P P N A0 OR A0 N N TO P-CHANNEL DEVICE OF THE SWITCH N A1 OR A1 N A2 OR A2 TO N-CHANNEL DEVICE OF THE SWITCH N A3 OR A3 (HS-0506RH ONLY) N ENABLE V- FIGURE 4. ADDRESS DECODER +V P3 P1 +V D1 VL D2 200 -V AIN N2 VR N1 P4 P5 A P6 P7 P8 P9 P10 N6 P2 N4 N5 N7 N8 N9 N10 A N3 -V ALL N-CHANEL BODIES TO VALL P-CHANNEL BODIES TO V+ UNLESS OTHERWISE INDICATED FIGURE 5. ADDRESS INPUT BUFFER LEVER SHIFTER Spec Number 12 518860 HS-0506RH, HS-0507RH Schematic Diagrams (Continued) V+ P15 Q1P Q2P Q3P Q4P Q5N Q6N R2 N12 Q11P Q10N Q9P P16 N13 N14 N15 Q12N D3 R3 VR Q7P Q8N VL V- GND FIGURE 6. TTL REFERENCE CIRCUIT FROM DECODE N18 V+ IN P17 N19 N17 OUT V- P18 FROM DECODE FIGURE 7. MULTIPLEX SWITCH Spec Number 13 518860 HS-0506RH, HS-0507RH Metallization Topology DIE DIMENSIONS: 82 x 129 x 19 mils METALLIZATION: Type: Al Thickness: 16kA 2kA GLASSIVATION: Type: Nitride Thickness: 7kA 0.7kA WORST CASE CURRENT DENSITY: < 2.0 x 105 A/cm2 TRANSISTOR COUNT: HS-0506RH 421 HS-0507RH 421 PROCESS: CMOS-DI Metallization Mask Layout HS-0506RH HS-0507RH NOTE: Pad numbers correspond to DIP pin numbers only. Spec Number 14 518860 |
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